1. Field of the Invention
The present invention relates generally to a method of manufacturing a copper-clad laminate for via-on-pad application and, more particularly, to a method of manufacturing a copper-clad laminate for via-on-pad application, which makes possible the manufacture of the copper-clad laminate in which a blind via hole is formed on a super-thin copper foil layer.
2. Description of the Related Art
With the rapid digitization and networking of the electronic industry, the Printed Circuit Board (PCB) technology is being rapidly developed. As complete set companies demand high-frequency band and high-speed signal processing speed specifications, new advanced technologies enabling the design for super-thin foils and fine circuits are required. Several years ago, the circuit line width and interlayer thickness of PCBs each were about 200 μm. However, recently, the circuit width and the interlayer thickness have been each reduced to a thickness equal to or less than 100 μm, thereby the related industries have entered the Nano era. In particular, various new technologies, such as micro-via and build-up technologies, are attracting attention as high value-added technologies for achieving the high integration and super-thinness of package substrates and mobile terminal substrates.
For double-sided PCBs, a Plated Through Hole (PTH) technology of forming through holes and then performing electroless plating and electrolytic copper plating on the through holes has been chiefly used. However, as, recently, the size of packages gradually decreases, the number of chips to be mounted in the limited area of each PCB is rapidly increasing. That is, a Ball Grid Array (BGA)-type double-sided PCB requires a larger number of solder balls to be mounted in the limited area of each PCB. To meet this requirement, the size of solder balls and the distance between solder balls are gradually reduced. That is, the solder ball pitch becomes finer. To implement such a fine ball pitch, a Via-On-Pad (VOP) technology, instead of the PTH technology, is being more widely used. A through via hole formed using the PTH technology functions only to realize interlayer connection, whereas a blind via hole formed using the VOP technology functions to provide a solder ball pad for the mounting of solder balls as well as to realize interlayer connection. Accordingly, the VOP technology has the advantage of significantly reducing the solder ball pitch.
With reference to FIGS. 1A to 1F, a prior art method of manufacturing a copper-clad laminate for VOP application is described below.
First, a copper-clad laminate 4 is formed by arranging copper foil layers 2 and 2′ on both surfaces of an insulating layer 1, as illustrated in FIG. 1A, and laminating the elements together, as illustrated in FIG. 1B.
In this case, a protective layer 3 or 3′ for protecting the surface of the copper foil layer 2 or 2′ during a transport or lamination process is formed on one surface of each of the copper foil layer copper foil layer 2 or 2′.
Furthermore, each of the copper foil layers 2 and 2′ is formed to be thicker than 10 μm in view of the heat that is generated during a subsequent laser process.
Thereafter, as illustrated in FIG. 1C, the protective layers 3 and 3′ formed on the surfaces of the copper foil layers 2 and 2′ are removed.
Next, as illustrated in FIG. 1D, part of the upper copper foil layer 2 is removed using etching or the like, thereby exposing part of the insulating layer 1 outside.
Thereafter, as illustrated in FIG. 1E, the exposed part of the insulating layer 1 is removed using laser processing, thereby forming a blind via hole 5 on which only the lower copper foil layer 2′ remains.
Finally, as illustrated in FIG. 1F, a plating layer 6 for providing conductivity is formed on the inside of the via hole 5, thereby realizing a copper-clad laminate for VOP application.
The above-described prior art copper-clad laminate for VOP application has a problem in that, to prevent the copper foil layer 2′ from being damaged by the heat generated during laser processing that is performed to form the via hole 5, the thickness of each of the copper foil layers 2 and 2′ must be maintained greater than a specific thickness.
FIG. 2 is a sectional view of a copper-clad laminate for VOP application, which is formed using the prior art method of manufacturing a copper-clad laminate for VOP application, when the copper foil layers 2 and 2′ each have a thickness equal to or less than 5 μm. With reference to this drawing, the above-described problem is further described below.
As illustrated in FIG. 2, when, to form a fine circuit pattern, each of the copper foil layers 2 or 2′ is formed to be thinner than 5 μm and laser processing is performed, heat generated in a laser beam is not sufficiently dissipated, therefore the insulating layer 1 is removed and a pin hole A or the like is generated in the lower copper foil layer 2′.
Accordingly, since each of the copper foil layers 2 and 2′ must be thicker than the specific thickness in order to prevent the above problem, there occurs a problem in that it is difficult to manufacture a copper-clad laminate for VOP application for the implementation of a fine circuit pattern using the prior art method of manufacturing a copper-clad laminate for VOP application.